1. Field of the Technology
The present technology relates to design for reliability of memory cells in charge trapping flash memories.
2. Description of Related Art
In charge trapping flash memories, shallow trench isolation (STI) edge fringing field effect can occur in a near planar structure, a body-tied FinFET structure, a self-aligned STI structure, and a gate-all-around thin film transistor structure. STI edge fringing field effect can cause abnormal subthreshold current during programming of charge trapping flash memories. The edge fringing field effect can degrade the tunnel oxide electric field, change the program/erase (P/E) speed, lead to large device variation, and degrade the incremental-step-pulse programming (ISPP) slope. Consequently, the STI edge fringing field effect degrades the reliability of charge trapping flash memories, including three dimensional flash memories, as charge trapping flash memories are scaled down.
It is desirable to provide a more reliable memory cell structure for charge trapping flash memories, including NAND flash and NOR flash.